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perf: Core module

legacy
Dnomd343 2 years ago
parent
commit
6af768937b
  1. 71
      src/core/core.cc
  2. 17
      src/core/core.h

71
src/core/core.cc

@ -23,29 +23,20 @@
#define CHECK_LEFT(MASK) !(code >> MOVE_LEFT & MASK) #define CHECK_LEFT(MASK) !(code >> MOVE_LEFT & MASK)
#define CHECK_RIGHT(MASK) !(code >> MOVE_RIGHT & MASK) #define CHECK_RIGHT(MASK) !(code >> MOVE_RIGHT & MASK)
#define RELEASE(NEXT_CODE, FILTER) { \ #define RELEASE_1x1(FILTER) RELEASE(NEXT_CODE_1x1, FILTER)
cache_t next_case = { \ #define RELEASE_1x2(FILTER) RELEASE(NEXT_CODE_1x2, FILTER)
.code = NEXT_CODE, \ #define RELEASE_2x1(FILTER) RELEASE(NEXT_CODE_2x1, FILTER)
.mask = F_1x1 << next_addr, \ #define RELEASE_2x2(FILTER) RELEASE(NEXT_CODE_2x2, FILTER)
.filter = FILTER, \
.addr = next_addr \
}; \
cache_insert(next_case); \
}
#define release_1x1(FILTER) RELEASE(NEXT_CODE_1x1, FILTER)
#define release_1x2(FILTER) RELEASE(NEXT_CODE_1x2, FILTER)
#define release_2x1(FILTER) RELEASE(NEXT_CODE_2x1, FILTER)
#define release_2x2(FILTER) RELEASE(NEXT_CODE_2x2, FILTER)
#define NEXT_CODE_1x1 (code & ~(F_1x1 << addr) | (C_1x1 << next_addr)) #define NEXT_CODE_1x1 (code & ~(F_1x1 << addr) | (C_1x1 << next_addr))
#define NEXT_CODE_1x2 (code & ~(F_1x2 << addr) | (C_1x2 << next_addr)) #define NEXT_CODE_1x2 (code & ~(F_1x2 << addr) | (C_1x2 << next_addr))
#define NEXT_CODE_2x1 (code & ~(F_2x1 << addr) | (C_2x1 << next_addr)) #define NEXT_CODE_2x1 (code & ~(F_2x1 << addr) | (C_2x1 << next_addr))
#define NEXT_CODE_2x2 (code & ~(F_2x2 << addr) | (C_2x2 << next_addr)) #define NEXT_CODE_2x2 (code & ~(F_2x2 << addr) | (C_2x2 << next_addr))
////////////////////////////////////////
#define BFS_INIT \ #define BFS_INIT \
int next_addr; \ int next_addr; \
cache_size = 1; \
int current = 0; \ int current = 0; \
cache[0].addr = addr; cache[0].addr = addr;
@ -56,6 +47,19 @@ int filter = cache[current++].filter;
#define BFS_STOP (current == cache_size) #define BFS_STOP (current == cache_size)
////////////////////////////////////////
#define RELEASE(NEXT_CODE, FILTER) \
cache_t next_case = { \
.code = NEXT_CODE, \
.mask = F_1x1 << next_addr, \
.filter = FILTER, \
.addr = next_addr \
}; \
cache_insert(next_case);
////////////////////////////////////////
inline void Core::cache_insert(Core::cache_t &next_case) { // try to insert into cache inline void Core::cache_insert(Core::cache_t &next_case) { // try to insert into cache
auto *p = cache; auto *p = cache;
for (; p < cache + cache_size; ++p) { for (; p < cache + cache_size; ++p) {
@ -72,16 +76,16 @@ void Core::move_1x1(uint64_t code, int addr) { // try to move target 1x1 block
while (!BFS_STOP) { // bfs search process while (!BFS_STOP) { // bfs search process
BFS_LOAD BFS_LOAD
if (ALLOW_UP && TOP_LIMIT(4) && CHECK_UP(F_1x1)) { if (ALLOW_UP && TOP_LIMIT(4) && CHECK_UP(F_1x1)) {
release_1x1(UP) // 1x1 block move up RELEASE_1x1(UP) // 1x1 block move up
} }
if (ALLOW_DOWN && BOTTOM_LIMIT(15) && CHECK_DOWN(F_1x1)) { if (ALLOW_DOWN && BOTTOM_LIMIT(15) && CHECK_DOWN(F_1x1)) {
release_1x1(DOWN) // 1x1 block move down RELEASE_1x1(DOWN) // 1x1 block move down
} }
if (ALLOW_LEFT && NOT_COLUMN_0 && CHECK_LEFT(F_1x1)) { if (ALLOW_LEFT && NOT_COLUMN_0 && CHECK_LEFT(F_1x1)) {
release_1x1(LEFT) // 1x1 block move left RELEASE_1x1(LEFT) // 1x1 block move left
} }
if (ALLOW_RIGHT && NOT_COLUMN_3 && CHECK_RIGHT(F_1x1)) { if (ALLOW_RIGHT && NOT_COLUMN_3 && CHECK_RIGHT(F_1x1)) {
release_1x1(RIGHT) // 1x1 block move right RELEASE_1x1(RIGHT) // 1x1 block move right
} }
} }
} }
@ -91,16 +95,16 @@ void Core::move_1x2(uint64_t code, int addr) { // try to move target 1x2 block
while (!BFS_STOP) { // bfs search process while (!BFS_STOP) { // bfs search process
BFS_LOAD BFS_LOAD
if (ALLOW_UP && TOP_LIMIT(4) && CHECK_UP(F_1x2)) { if (ALLOW_UP && TOP_LIMIT(4) && CHECK_UP(F_1x2)) {
release_1x2(UP) // 1x2 block move up RELEASE_1x2(UP) // 1x2 block move up
} }
if (ALLOW_DOWN && BOTTOM_LIMIT(14) && CHECK_DOWN(F_1x2)) { if (ALLOW_DOWN && BOTTOM_LIMIT(14) && CHECK_DOWN(F_1x2)) {
release_1x2(DOWN) // 1x2 block move down RELEASE_1x2(DOWN) // 1x2 block move down
} }
if (ALLOW_LEFT && NOT_COLUMN_0 && CHECK_LEFT(F_1x1)) { if (ALLOW_LEFT && NOT_COLUMN_0 && CHECK_LEFT(F_1x1)) {
release_1x2(LEFT) // 1x2 block move left RELEASE_1x2(LEFT) // 1x2 block move left
} }
if (ALLOW_RIGHT && NOT_COLUMN_2 && CHECK_RIGHT(F_1x1_R)) { if (ALLOW_RIGHT && NOT_COLUMN_2 && CHECK_RIGHT(F_1x1_R)) {
release_1x2(RIGHT) // 1x2 block move right RELEASE_1x2(RIGHT) // 1x2 block move right
} }
} }
} }
@ -110,16 +114,16 @@ void Core::move_2x1(uint64_t code, int addr) { // try to move target 2x1 block
while (!BFS_STOP) { // bfs search process while (!BFS_STOP) { // bfs search process
BFS_LOAD BFS_LOAD
if (ALLOW_UP && TOP_LIMIT(4) && CHECK_UP(F_1x1)) { if (ALLOW_UP && TOP_LIMIT(4) && CHECK_UP(F_1x1)) {
release_2x1(UP) // 2x1 block move up RELEASE_2x1(UP) // 2x1 block move up
} }
if (ALLOW_DOWN && BOTTOM_LIMIT(11) && CHECK_DOWN(F_1x1_D)) { if (ALLOW_DOWN && BOTTOM_LIMIT(11) && CHECK_DOWN(F_1x1_D)) {
release_2x1(DOWN) // 2x1 block move down RELEASE_2x1(DOWN) // 2x1 block move down
} }
if (ALLOW_LEFT && NOT_COLUMN_0 && CHECK_LEFT(F_2x1)) { if (ALLOW_LEFT && NOT_COLUMN_0 && CHECK_LEFT(F_2x1)) {
release_2x1(LEFT) // 2x1 block move left RELEASE_2x1(LEFT) // 2x1 block move left
} }
if (ALLOW_RIGHT && NOT_COLUMN_3 && CHECK_RIGHT(F_2x1)) { if (ALLOW_RIGHT && NOT_COLUMN_3 && CHECK_RIGHT(F_2x1)) {
release_2x1(RIGHT) // 2x1 block move right RELEASE_2x1(RIGHT) // 2x1 block move right
} }
} }
} }
@ -129,16 +133,16 @@ void Core::move_2x2(uint64_t code, int addr) { // try to move target 2x2 block
while (!BFS_STOP) { // bfs search process while (!BFS_STOP) { // bfs search process
BFS_LOAD BFS_LOAD
if (ALLOW_UP && TOP_LIMIT(4) && CHECK_UP(F_1x2)) { if (ALLOW_UP && TOP_LIMIT(4) && CHECK_UP(F_1x2)) {
release_2x2(UP) // 2x2 block move up RELEASE_2x2(UP) // 2x2 block move up
} }
if (ALLOW_DOWN && BOTTOM_LIMIT(10) && CHECK_DOWN(F_1x2_D)) { if (ALLOW_DOWN && BOTTOM_LIMIT(10) && CHECK_DOWN(F_1x2_D)) {
release_2x2(DOWN) // 2x2 block move down RELEASE_2x2(DOWN) // 2x2 block move down
} }
if (ALLOW_LEFT && NOT_COLUMN_0 && CHECK_LEFT(F_2x1)) { if (ALLOW_LEFT && NOT_COLUMN_0 && CHECK_LEFT(F_2x1)) {
release_2x2(LEFT) // 2x2 block move left RELEASE_2x2(LEFT) // 2x2 block move left
} }
if (ALLOW_RIGHT && NOT_COLUMN_2 && CHECK_RIGHT(F_2x1_R)) { if (ALLOW_RIGHT && NOT_COLUMN_2 && CHECK_RIGHT(F_2x1_R)) {
release_2x2(RIGHT) // 2x2 block move right RELEASE_2x2(RIGHT) // 2x2 block move right
} }
} }
} }
@ -166,12 +170,13 @@ void Core::next_step(uint64_t code, uint64_t mask) { // search next step cases
continue; // B_space or B_fill continue; // B_space or B_fill
} }
if (cache_size != 1) { // found one or more next cases if (cache_size != 1) { // found one or more next cases
for (int i = 1; i < cache_size; ++i) {
// TODO: try to send multi-items data // TODO: try to send multi-items data
for (int i = 1; i < cache_size; ++i) {
release(cache[i].code, cache[i].mask); // release next cases release(cache[i].code, cache[i].mask); // release next cases
} }
cache_size = 1; // reset cache size
} }
} }
} }

17
src/core/core.h

@ -2,16 +2,15 @@
#include <cstdint> #include <cstdint>
#define UP (-12) // -4 * 3-bits #define UP (-4 * 3)
#define LEFT (-3) // +1 * 3-bits #define LEFT (-1 * 3)
#define DOWN (+12) // +4 * 3-bits #define DOWN (+4 * 3)
#define RIGHT (+3) // +1 * 3-bits #define RIGHT (+1 * 3)
class Core { class Core {
public: public:
void next_step(uint64_t code, uint64_t mask); void next_step(uint64_t code, uint64_t mask);
explicit Core(void (*release_func)(uint64_t, uint64_t)) : release(release_func) {}
Core(void (*release_func)(uint64_t code, uint64_t mask)) : release(release_func) {}
private: private:
struct cache_t { struct cache_t {
@ -21,9 +20,9 @@ private:
int addr; // (0 ~ 19) * 3 int addr; // (0 ~ 19) * 3
}; };
int cache_size; int cache_size = 1;
cache_t cache[16]; cache_t cache[16] = {0};
void (*release)(uint64_t code, uint64_t mask); void (*release)(uint64_t, uint64_t); // release code and mask
void move_1x1(uint64_t code, int addr); void move_1x1(uint64_t code, int addr);
void move_1x2(uint64_t code, int addr); void move_1x2(uint64_t code, int addr);

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